X-Git-Url: http://sigrok.org/gitweb/?a=blobdiff_plain;f=decoders%2Fparallel%2Fpd.py;h=abf48eb170fc5b5ae3acc979f7d6ba340a56f873;hb=e2317ec49b8b04c7f8b3358c2e9c264de4280539;hp=405cdebf9170f684daeb5b9a9d21f248ec0ba669;hpb=d6d8a8a440ea2a81e6ddde33d16bc84d01cdb432;p=libsigrokdecode.git diff --git a/decoders/parallel/pd.py b/decoders/parallel/pd.py index 405cdeb..abf48eb 100644 --- a/decoders/parallel/pd.py +++ b/decoders/parallel/pd.py @@ -54,18 +54,19 @@ Packet: word is 7, and so on. ''' -def channel_list(num_channels): - l = [{'id': 'clk', 'name': 'CLK', 'desc': 'Clock line'}] - for i in range(num_channels): - d = {'id': 'd%d' % i, 'name': 'D%d' % i, 'desc': 'Data line %d' % i} - l.append(d) - return tuple(l) +NUM_CHANNELS = 8 + +class Pin: + CLOCK = 0 + DATA_0 = CLOCK + 1 + DATA_N = DATA_0 + NUM_CHANNELS + +class Ann: + ITEM, WORD = range(2) class ChannelError(Exception): pass -NUM_CHANNELS = 8 - class Decoder(srd.Decoder): api_version = 3 id = 'parallel' @@ -76,22 +77,28 @@ class Decoder(srd.Decoder): inputs = ['logic'] outputs = ['parallel'] tags = ['Util'] - optional_channels = channel_list(NUM_CHANNELS) + optional_channels = tuple( + [{'id': 'clk', 'name': 'CLK', 'desc': 'Clock line'}] + + [ + {'id': 'd%d' % i, 'name': 'D%d' % i, 'desc': 'Data line %d' % i} + for i in range(NUM_CHANNELS) + ] + ) options = ( {'id': 'clock_edge', 'desc': 'Clock edge to sample on', - 'default': 'rising', 'values': ('rising', 'falling')}, + 'default': 'rising', 'values': ('rising', 'falling', 'either')}, {'id': 'wordsize', 'desc': 'Data wordsize (# bus cycles)', 'default': 0}, {'id': 'endianness', 'desc': 'Data endianness', 'default': 'little', 'values': ('little', 'big')}, ) annotations = ( - ('items', 'Items'), - ('words', 'Words'), + ('item', 'Item'), + ('word', 'Word'), ) annotation_rows = ( - ('items', 'Items', (0,)), - ('words', 'Words', (1,)), + ('items', 'Items', (Ann.ITEM,)), + ('words', 'Words', (Ann.WORD,)), ) def __init__(self): @@ -128,7 +135,7 @@ class Decoder(srd.Decoder): if self.saved_word is not None: if self.options['wordsize'] > 0: self.es_word = self.samplenum - self.putw([1, [self.fmt_word.format(self.saved_word)]]) + self.putw([Ann.WORD, [self.fmt_word.format(self.saved_word)]]) self.putpw(['WORD', self.saved_word]) self.saved_word = None @@ -144,7 +151,7 @@ class Decoder(srd.Decoder): # Output the saved item (from the last CLK edge to the current). self.es_item = self.samplenum self.putpb(['ITEM', self.saved_item]) - self.putb([0, [self.fmt_item.format(self.saved_item)]]) + self.putb([Ann.ITEM, [self.fmt_item.format(self.saved_item)]]) self.ss_item = self.samplenum self.saved_item = item @@ -169,44 +176,49 @@ class Decoder(srd.Decoder): # Determine which (optional) channels have input data. Insist in # a non-empty input data set. Cope with sparse connection maps. # Store enough state to later "compress" sampled input data. - max_possible = len(self.optional_channels) - idx_channels = [ + data_indices = [ idx if self.has_channel(idx) else None - for idx in range(max_possible) + for idx in range(Pin.DATA_0, Pin.DATA_N) ] - has_channels = [idx for idx in idx_channels if idx is not None] - if not has_channels: - raise ChannelError('At least one channel has to be supplied.') - max_connected = max(has_channels) - - # Determine .wait() conditions, depending on the presence of a - # clock signal. Either inspect samples on the configured edge of - # the clock, or inspect samples upon ANY edge of ANY of the pins - # which provide input data. - if self.has_channel(0): - edge = self.options['clock_edge'][0] - conds = {0: edge} - else: - conds = [{idx: 'e'} for idx in has_channels] + has_data = [idx for idx in data_indices if idx is not None] + if not has_data: + raise ChannelError('Need at least one data channel.') + max_connected = max(has_data) # Pre-determine which input data to strip off, the width of # individual items and multiplexed words, as well as format # strings here. This simplifies call sites which run in tight # loops later. - idx_strip = max_connected + 1 - num_item_bits = idx_strip - 1 + upper_data_bound = max_connected + 1 + num_item_bits = upper_data_bound - Pin.DATA_0 num_word_items = self.options['wordsize'] num_word_bits = num_item_bits * num_word_items - num_digits = (num_item_bits + 3) // 4 + num_digits = (num_item_bits + 4 - 1) // 4 self.fmt_item = "{{:0{}x}}".format(num_digits) - num_digits = (num_word_bits + 3) // 4 + num_digits = (num_word_bits + 4 - 1) // 4 self.fmt_word = "{{:0{}x}}".format(num_digits) + # Determine .wait() conditions, depending on the presence of a + # clock signal. Either inspect samples on the configured edge of + # the clock, or inspect samples upon ANY edge of ANY of the pins + # which provide input data. + has_clock = self.has_channel(Pin.CLOCK) + if has_clock: + edge = { + 'rising': 'r', + 'falling': 'f', + 'either': 'e', + }.get(self.options['clock_edge']) + conds = [{Pin.CLOCK: edge}] + else: + conds = [{idx: 'e'} for idx in has_data] + # Keep processing the input stream. Assume "always zero" for # not-connected input lines. Pass data bits (all inputs except # clock) to the handle_bits() method. while True: pins = self.wait(conds) - bits = [0 if idx is None else pins[idx] for idx in idx_channels] - item = bitpack(bits[1:idx_strip]) + data_bits = [0 if idx is None else pins[idx] for idx in data_indices] + data_bits = data_bits[:num_item_bits] + item = bitpack(data_bits) self.handle_bits(item, num_item_bits)