X-Git-Url: http://sigrok.org/gitweb/?a=blobdiff_plain;f=decoders%2Fir_rc5%2Fpd.py;h=19624590c19de8f94d70b634b95318936bdc2dcf;hb=6a15597a7b3f901b566b7bfc8c484a14e0fb6a11;hp=1abba82d7a211f284334af2e985cab8611298b23;hpb=914f0b99d1f07c351742eaa5c8e397d601996846;p=libsigrokdecode.git diff --git a/decoders/ir_rc5/pd.py b/decoders/ir_rc5/pd.py index 1abba82..1962459 100644 --- a/decoders/ir_rc5/pd.py +++ b/decoders/ir_rc5/pd.py @@ -30,23 +30,24 @@ class Decoder(srd.Decoder): license = 'gplv2+' inputs = ['logic'] outputs = ['ir_rc5'] - probes = [ + channels = ( {'id': 'ir', 'name': 'IR', 'desc': 'IR data line'}, - ] - optional_probes = [] - options = { - 'polarity': ['Polarity', 'active-low'], - 'protocol': ['Protocol type', 'standard'], - } - annotations = [ - ['bit', 'Bit'], - ['startbit1', 'Startbit 1'], - ['startbit2', 'Startbit 2'], - ['togglebit-0', 'Toggle bit 0'], - ['togglebit-1', 'Toggle bit 1'], - ['address', 'Address'], - ['command', 'Command'], - ] + ) + options = ( + {'id': 'polarity', 'desc': 'Polarity', 'default': 'active-low', + 'values': ('active-low', 'active-high')}, + {'id': 'protocol', 'desc': 'Protocol type', 'default': 'standard', + 'values': ('standard', 'extended')}, + ) + annotations = ( + ('bit', 'Bit'), + ('startbit1', 'Startbit 1'), + ('startbit2', 'Startbit 2'), + ('togglebit-0', 'Toggle bit 0'), + ('togglebit-1', 'Toggle bit 1'), + ('address', 'Address'), + ('command', 'Command'), + ) annotation_rows = ( ('bits', 'Bits', (0,)), ('fields', 'Fields', (1, 2, 3, 4, 5, 6)), @@ -125,7 +126,11 @@ class Decoder(srd.Decoder): elif distance in range(s - margin, s + margin + 1): return 's' else: - raise Exception('Invalid edge distance: %d' % distance) + return 'e' # Error, invalid edge distance. + + def reset_decoder_state(self): + self.edges, self.bits, self.bits_ss_es = [], [], [] + self.state = 'IDLE' def decode(self, ss, es, data): if self.samplerate is None: @@ -145,20 +150,24 @@ class Decoder(srd.Decoder): self.state = 'MID1' self.old_ir = self.ir continue + edge = self.edge_type() + if edge == 'e': + self.reset_decoder_state() # Reset state machine upon errors. + continue if self.state == 'MID1': - self.state = 'START1' if self.edge_type() == 's' else 'MID0' - bit = None if self.edge_type() == 's' else 0 + self.state = 'START1' if edge == 's' else 'MID0' + bit = None if edge == 's' else 0 elif self.state == 'MID0': - self.state = 'START0' if self.edge_type() == 's' else 'MID1' - bit = None if self.edge_type() == 's' else 1 + self.state = 'START0' if edge == 's' else 'MID1' + bit = None if edge == 's' else 1 elif self.state == 'START1': - if self.edge_type() == 's': + if edge == 's': self.state = 'MID1' - bit = 1 if self.edge_type() == 's' else None + bit = 1 if edge == 's' else None elif self.state == 'START0': - if self.edge_type() == 's': + if edge == 's': self.state = 'MID0' - bit = 0 if self.edge_type() == 's' else None + bit = 0 if edge == 's' else None else: raise Exception('Invalid state: %s' % self.state) @@ -166,10 +175,9 @@ class Decoder(srd.Decoder): if bit != None: self.bits.append([self.samplenum, bit]) - if len(self.bits) == 14 + 1: + if len(self.bits) == 14: self.handle_bits() - self.edges, self.bits, self.bits_ss_es = [], [], [] - self.state = 'IDLE' + self.reset_decoder_state() self.old_ir = self.ir