X-Git-Url: http://sigrok.org/gitweb/?a=blobdiff_plain;f=decoder%2Ftest%2Fparallel%2Ftest.conf;h=1e751a40754e172bc8da4d453d43e02f11d38e9d;hb=f2e2d1b237a5ac1acb453a55b51867eb46a21316;hp=b6dd18c6f93e4575f7115f5942fc8025a05281c4;hpb=7974d8f42cc1629aa852b9c535b718d4fc8773e0;p=sigrok-test.git diff --git a/decoder/test/parallel/test.conf b/decoder/test/parallel/test.conf index b6dd18c..1e751a4 100644 --- a/decoder/test/parallel/test.conf +++ b/decoder/test/parallel/test.conf @@ -1,5 +1,5 @@ test incremental_8ch_short_noclock - protocol-decoder parallel channel d0=0 channel d1=1 channel d2=2 channel d3=3 channel d4=4 channel d5=5 channel d6=6 channel d7=7 + protocol-decoder parallel channel d0=0 channel d1=1 channel d2=2 channel d3=3 channel d4=4 channel d5=5 channel d6=6 channel d7=7 initial_pin d0=0 initial_pin d1=1 initial_pin d2=2 input misc/demo/incremental_8ch_short.sr output parallel annotation match incremental_8ch_short_noclock.output output parallel python match incremental_8ch_short_noclock.python @@ -11,7 +11,7 @@ test incremental_8ch_short_clock output parallel python match incremental_8ch_short_clock.python test incremental_8ch_long_noclock - protocol-decoder parallel channel d0=0 channel d1=1 channel d2=2 channel d3=3 channel d4=4 channel d5=5 channel d6=6 channel d7=7 + protocol-decoder parallel channel d0=0 channel d1=1 channel d2=2 channel d3=3 channel d4=4 channel d5=5 channel d6=6 channel d7=7 initial_pin d0=0 initial_pin d1=1 initial_pin d2=2 input misc/demo/incremental_8ch_long.sr output parallel annotation match incremental_8ch_long_noclock.output output parallel python match incremental_8ch_long_noclock.python @@ -21,3 +21,14 @@ test incremental_8ch_long_clock input misc/demo/incremental_8ch_long.sr output parallel annotation match incremental_8ch_long_clock.output output parallel python match incremental_8ch_long_clock.python + +test hd44780_word_demux + protocol-decoder parallel channel clk=3 channel d0=4 channel d1=5 channel d2=6 channel d3=7 option clock_edge=falling option wordsize=2 option endianness=big + input display/hd44780/hd44780-reset-init-hello.sr + output parallel annotation match hd44780_word_demux.output + +test spi_sqi_four_lines_one_xfer + protocol-decoder parallel channel clk=2 channel d0=4 channel d1=5 channel d2=6 channel d3=7 channel rst=3 option clock_edge=rising option reset_polarity=high-active option wordsize=2 option endianness=big + input spi/sqi/sqi-four-data-lines-one-transfer.sr + output parallel annotation match spi_sqi_four_lines_three_transfers.output + output parallel python match spi_sqi_four_lines_one_xfer.python