X-Git-Url: http://sigrok.org/gitweb/?a=blobdiff_plain;f=dcf77%2Fpollin_dcf1_module%2FREADME;h=4b49fb053590e27f4b70296274061fa5d6cbce5e;hb=3e5a7b35ce7d0a14d998e34fa2fc530ca1ba615b;hp=ef8977d9b16011328c46665a372cb1c4db1db07f;hpb=ad9c1894af793c7dfb8f73086634425ae3f9df27;p=sigrok-dumps.git

diff --git a/dcf77/pollin_dcf1_module/README b/dcf77/pollin_dcf1_module/README
index ef8977d..4b49fb0 100644
--- a/dcf77/pollin_dcf1_module/README
+++ b/dcf77/pollin_dcf1_module/README
@@ -19,15 +19,12 @@ http://www.pollin.de/shop/downloads/D810054D.PDF
 Logic analyzer setup
 --------------------
 
-The logic analyzer used for capturing was a Saleae Logic.
-
-The logic analyzer probes were connected like this:
+The logic analyzer used was a Saleae Logic (at 1MHz):
 
   Probe       DCF77 module
   ------------------------
   1 (black)   PON
   2 (brown)   DATA
-  GND         GND
 
 
 Data