X-Git-Url: http://sigrok.org/gitweb/?a=blobdiff_plain;f=dcf77%2Fpollin_dcf1_module%2FREADME;h=4b49fb053590e27f4b70296274061fa5d6cbce5e;hb=3e5a7b35ce7d0a14d998e34fa2fc530ca1ba615b;hp=b6fce078863363c0d9d1d6d3ee22858fab2cb623;hpb=f793c6d26e576d436b93b3414a00b9d2fcdcdaba;p=sigrok-dumps.git

diff --git a/dcf77/pollin_dcf1_module/README b/dcf77/pollin_dcf1_module/README
index b6fce07..4b49fb0 100644
--- a/dcf77/pollin_dcf1_module/README
+++ b/dcf77/pollin_dcf1_module/README
@@ -19,9 +19,7 @@ http://www.pollin.de/shop/downloads/D810054D.PDF
 Logic analyzer setup
 --------------------
 
-The logic analyzer used for capturing was a Saleae Logic.
-
-The logic analyzer probes were connected like this:
+The logic analyzer used was a Saleae Logic (at 1MHz):
 
   Probe       DCF77 module
   ------------------------