X-Git-Url: http://sigrok.org/gitweb/?a=blobdiff_plain;ds=inline;f=decoders%2Fspi%2Fpd.py;h=fd9a78fd7d87c3a9568c519676ffc695c9687fbf;hb=HEAD;hp=b08b8a8d93ee0a208160fac6b7805b1573d17159;hpb=fa7fdc54764d574446002c12d328b6f8bbb7e803;p=libsigrokdecode.git diff --git a/decoders/spi/pd.py b/decoders/spi/pd.py index b08b8a8..fd9a78f 100644 --- a/decoders/spi/pd.py +++ b/decoders/spi/pd.py @@ -82,6 +82,7 @@ class Decoder(srd.Decoder): license = 'gplv2+' inputs = ['logic'] outputs = ['spi'] + tags = ['Embedded/industrial'] channels = ( {'id': 'clk', 'name': 'CLK', 'desc': 'Clock'}, ) @@ -104,15 +105,19 @@ class Decoder(srd.Decoder): annotations = ( ('miso-data', 'MISO data'), ('mosi-data', 'MOSI data'), - ('miso-bits', 'MISO bits'), - ('mosi-bits', 'MOSI bits'), - ('warnings', 'Human-readable warnings'), + ('miso-bit', 'MISO bit'), + ('mosi-bit', 'MOSI bit'), + ('warning', 'Warning'), + ('miso-transfer', 'MISO transfer'), + ('mosi-transfer', 'MOSI transfer'), ) annotation_rows = ( - ('miso-data', 'MISO data', (0,)), ('miso-bits', 'MISO bits', (2,)), - ('mosi-data', 'MOSI data', (1,)), + ('miso-data-vals', 'MISO data', (0,)), + ('miso-transfers', 'MISO transfers', (5,)), ('mosi-bits', 'MOSI bits', (3,)), + ('mosi-data-vals', 'MOSI data', (1,)), + ('mosi-transfers', 'MOSI transfers', (6,)), ('other', 'Other', (4,)), ) binary = ( @@ -121,6 +126,9 @@ class Decoder(srd.Decoder): ) def __init__(self): + self.reset() + + def reset(self): self.samplerate = None self.bitcount = 0 self.misodata = self.mosidata = 0 @@ -129,24 +137,22 @@ class Decoder(srd.Decoder): self.misobytes = [] self.mosibytes = [] self.ss_block = -1 - self.samplenum = -1 self.ss_transfer = -1 self.cs_was_deasserted = False self.have_cs = self.have_miso = self.have_mosi = None - def metadata(self, key, value): - if key == srd.SRD_CONF_SAMPLERATE: - self.samplerate = value - def start(self): self.out_python = self.register(srd.OUTPUT_PYTHON) self.out_ann = self.register(srd.OUTPUT_ANN) self.out_binary = self.register(srd.OUTPUT_BINARY) - if self.samplerate is not None: - self.out_bitrate = self.register(srd.OUTPUT_META, - meta=(int, 'Bitrate', 'Bitrate during transfers')) + self.out_bitrate = self.register(srd.OUTPUT_META, + meta=(int, 'Bitrate', 'Bitrate during transfers')) self.bw = (self.options['wordsize'] + 7) // 8 + def metadata(self, key, value): + if key == srd.SRD_CONF_SAMPLERATE: + self.samplerate = value + def putw(self, data): self.put(self.ss_block, self.samplenum, self.out_ann, data) @@ -207,17 +213,18 @@ class Decoder(srd.Decoder): not self.cs_asserted(cs) if self.have_cs else False ws = self.options['wordsize'] + bo = self.options['bitorder'] # Receive MISO bit into our shift register. if self.have_miso: - if self.options['bitorder'] == 'msb-first': + if bo == 'msb-first': self.misodata |= miso << (ws - 1 - self.bitcount) else: self.misodata |= miso << self.bitcount # Receive MOSI bit into our shift register. if self.have_mosi: - if self.options['bitorder'] == 'msb-first': + if bo == 'msb-first': self.mosidata |= mosi << (ws - 1 - self.bitcount) else: self.mosidata |= mosi << self.bitcount @@ -249,10 +256,10 @@ class Decoder(srd.Decoder): self.putdata() # Meta bitrate. - if self.samplerate is not None: + if self.samplerate: elapsed = 1 / float(self.samplerate) elapsed *= (self.samplenum - self.ss_block + 1) - bitrate = int(1 / elapsed * self.options['wordsize']) + bitrate = int(1 / elapsed * ws) self.put(self.ss_block, self.samplenum, self.out_bitrate, bitrate) if self.have_cs and self.cs_was_deasserted: @@ -271,7 +278,13 @@ class Decoder(srd.Decoder): self.ss_transfer = self.samplenum self.misobytes = [] self.mosibytes = [] - else: + elif self.ss_transfer != -1: + if self.have_miso: + self.put(self.ss_transfer, self.samplenum, self.out_ann, + [5, [' '.join(format(x.val, '02X') for x in self.misobytes)]]) + if self.have_mosi: + self.put(self.ss_transfer, self.samplenum, self.out_ann, + [6, [' '.join(format(x.val, '02X') for x in self.mosibytes)]]) self.put(self.ss_transfer, self.samplenum, self.out_python, ['TRANSFER', self.mosibytes, self.misobytes]) @@ -326,12 +339,9 @@ class Decoder(srd.Decoder): # process the very first sample before checking for edges. The # previous implementation did this by seeding old values with # None, which led to an immediate "change" in comparison. - pins = self.wait({}) - (clk, miso, mosi, cs) = pins + (clk, miso, mosi, cs) = self.wait({}) self.find_clk_edge(miso, mosi, clk, cs, True) while True: - # Ignore identical samples early on (for performance reasons). - pins = self.wait(wait_cond) - (clk, miso, mosi, cs) = pins + (clk, miso, mosi, cs) = self.wait(wait_cond) self.find_clk_edge(miso, mosi, clk, cs, False)